ASML's bonding push and AMD's growth call shift AI chips to packaging
The next constraint in AI hardware may move from model training to how chips are assembled and how much compute can be bought.
Rafael ImaiCompute, chips and power
Reports place ASML in next-generation hybrid bonding while Chinese firms are said to adopt the technique. AMD's Lisa Su is reported to have projected a tenfold processor-market expansion by 2030. The three indicators are only snapshots, so the real test is whether packaging capacity and demand turn into orders.
The number to watch is not a model score; it is a packaging step. Reports attribute to AMD chief executive Lisa Su a projection that the processor market will grow tenfold by 2030. Whether or not that exact phrasing stands up, it points to a market that may stop being limited mainly by algorithmic ambition and start being limited by how much compute can be assembled, powered and cooled.
If even a milder version of that growth materialises, the pressure moves downstream. AI accelerators are not just fabricated; they are assembled. The slowest of those steps can set the shipping rate.
ASML is described as expanding into next-generation hybrid bonding, a technique said to create dense electrical connections. The attraction is straightforward: more connections in the same area can let separate silicon pieces behave like a larger processor. That makes packaging part of the capacity story.
Packaging becomes the chokepoint
Chinese firms are reported to be adopting the hybrid-bonding chip-packaging technique. If so, the geography of advanced packaging widens. The reported technique may make packaging a more central part of compute capacity, though the outcome depends on execution.
Hybrid bonding's reported value is density. Dense electrical connections are the physical route to more communication paths between adjacent dies. In AI hardware, those paths can determine whether a package behaves like one large processor or like several constrained parts.
There is also room for restraint. The description of ASML expanding into hybrid bonding may overstate what could be a research initiative, a patent position or a partnership rather than a new business line. Without more confirmation, the expansion should be treated as a direction, not a result.
A tenfold call needs a build-out
The AMD projection is the louder signal, and the harder one to use. A processor market ten times larger by 2030 would imply a much larger physical footprint for compute, with consequences for power and cooling. It would also make packaging capacity a question of lead time rather than rhetoric.
The figure is extreme for a major hardware category. Without more confirmation, it is safer to treat tenfold as a reported ambition or scenario rather than a baseline. A more measured statement about significant growth would change the capacity picture substantially.
The economic indicators included with the story do not settle the argument. SEMI_PPI stood at 28.801 on 1 September, INFO_SECTOR_EMP at 2,739, and ELEC_PRICE at 0.196. Each is a level, not a trend.
The dashboard is thin
A price index at 28.801 can show where semiconductor-related prices sit at one moment, but without a prior reading it cannot say whether costs are accelerating or cooling. An employment count of 2,739 is similarly narrow: it may describe a segment, a region or a category, but the number alone does not reveal hiring momentum.
Electricity at 0.196 matters because electricity is an input for compute capacity, but again the level needs a comparator. A data-centre build-out is sensitive to power prices, yet one figure cannot show whether the cost of running AI hardware is becoming easier or harder to absorb.
The open question is whether the packaging reports and the growth projection meet in purchase orders. If hybrid-bonding tools are ordered, installed and qualified, and if processor demand appears as contracted capacity rather than conference rhetoric, the AI chip story will have shifted. Until then, the bottleneck is a projection waiting for capacity.
- 01SEMI_PPI, INFO_SECTOR_EMP and ELEC_PRICE were 28.801, 2,739 and 0.196 on 1 September.
- 02ASML is described as expanding into next-generation hybrid bonding.
- 03Chinese firms are reported to be adopting the hybrid-bonding chip-packaging technique.
- 04AMD's Lisa Su is reported to have projected a tenfold processor-market increase by 2030.
Interpretation, not reporting. The facts above carry their tiers; this is one correspondent’s reading of them.
The real shift here is from performance rhetoric to physical throughput. I see hybrid bonding as the kind of unglamorous step that matters because it sits where silicon, packaging and power constraints meet. The reported tenfold processor-market figure is too steep to use as a base case, but even a fraction of that growth would change how much weight I put on packaging capacity and electricity costs. The 1 September indicators are too thin to confirm a cycle: a price index, an employment count and a power price need history before they become signals. I would watch whether the reported adoption of hybrid bonding and the reported AMD projection reinforce one another. If they do not, the bottleneck remains largely rhetorical.
— Rafael Imai
Every claim in this article, and what it rests on
We do not ask you to take our word for it. Each statement below carries its tier and its sources. Where sources disagree, you get both accounts and what would settle it.
SEMI_PPI was 28.801 on 2026-09-01.
INFO_SECTOR_EMP was 2739 on 2026-09-01.
ELEC_PRICE was 0.196 on 2026-09-01.
ASML is expanding into next-generation hybrid bonding.
Hybrid bonding creates dense electrical connections.
Chinese firms are adopting the hybrid-bonding chip packaging technique.
AMD CEO Lisa Su projected that the processor market will grow tenfold by 2030.
The case against this story
Written by an adversarial reviewer, not the correspondent
The story's overall picture is of a semiconductor industry on the cusp of explosive, multi-front growth—ASML pushing into hybrid bonding, Chinese firms adopting the technique, and AMD CEO Lisa Su projecting the processor market will grow tenfold by 2030. The strongest case against this picture is that its most dramatic claim, the tenfold projection, is an extreme figure: a market growing to roughly ten times its current size in under four years would be unprecedented for any major hardware category, and no direct quote, speech transcript, or earnings-call citation is provided to confirm Su actually said this. If Su said something more measured—such as 'significant growth' or 'multiples of today's size'—the 'tenfold' framing could be a substantial exaggeration that inflates the entire narrative. Separately, ASML is fundamentally a lithography-equipment company; describing it as 'expanding into' hybrid bonding may overstate what could be a research initiative, patent filing, or partnership rather than a genuine business-line expansion. The three economic indicators are presented as precise facts but without context or source—a price index of 28.801, an employment count of 2739, and an electricity price of 0.196 each mean little without historical comparison, regional scope, or methodology. The narrative stacks several uncertain or thinly sourced claims to create an impression of unstoppable industry momentum.
Who benefits from this framing: Investors and speculators in semiconductor equities—particularly ASML, AMD, and companies in the advanced-packaging supply chain—benefit if readers accept a framing of imminent, explosive growth. Industry analysts and trade groups advocating for continued capital investment and government subsidies in chip manufacturing also benefit, as do lobbying organisations that can point to a 'tenfold market projection' to justify public funding. A reader who believes the tenfold figure may allocate capital, support policy, or make business decisions on the basis of an unsourced and potentially exaggerated claim.
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